The present invention relates to charge coupled devices (CCD) generally and specifically to channel wells to permit greater charge holding capacity and to permit more rapid movement of charges between gates.
Charge coupled devices are solid state devices that, when formed in arrays and used with suitable imaging hardware, can be used to capture video images.
FIGS. 1, 2A and 2B illustrate a prior art 4 phase charge coupled device structure. FIG. 1 is a top view showing horizontal signal lines running over the channel stop regions and making connections to every fourth gate. Four gates over a channel region comprise a pixel, so the Figure shows three complete pixels. The gates are comprised of overlapping but electrically isolated polysilicon lines running vertically. Holes in the polysilicon lines allow light energy to enter and induce an electron-hole pair when the photon energy exceeds the Si bandgap. Electrical fields cause the electrons to be swept into the channel regions under the gates. Once the image is stored, it is read out much like a shift register is read out. Signals 1-4 force the stored charge to move to the right as two adjacent gates are always turned on together. Holding the voltage high on gates 1 and 2, while keeping the voltage low on gates 3 and 4, creates a potential well under gates 1 and 2 that collects photo-induced charge for the pixel. Changing the voltage on 1 to low and on 3 to high, forces the charge to move from under the 1 and 2 gates to under the 2 and 3 gates. Reversing polarity on the 2 and 4 gates moves the charge under the 3 and 4 gates. The process is repeated until all the original charge in the pixel is now in the new pixel. Of course, any charge in the previous pixel is now in this pixel. This comprises one transfer cycle. The transfer cycles are repeated until all the pixels have been read out, each being moved across the array. Extremely high transfer efficiency is desired because several thousand transfers may be required for the charge to reach the edge of the array.
FIG. 2A is a cross-sectional view through line AA of FIG. 1 showing the overlap of the polysilicon gates along the channel.
FIG. 2B is a cross-sectional view through line BB of FIG. 1 across several channel regions. A peaked P well is present as a vertical antiblooming device. Recess oxidation with P type channel stops acts as isolation between adjacent channel regions. If CCD""s are overexposed (the potential wells under the gates cannot hold all the charge), the extra charge will spill over into adjacent pixels. The antiblooming device shown is of the vertical antiblooming type. When collected charge in the channel reaches the well, the excess charge is collected in the substrate.
Dark current is another problem associated with CCD""s. Dark current is noise resulting from electrons generated by thermal vibration, by surface states, or in bulk defects. These electrons may collect under the gates, causing white spots and columns in the resulting readout. Dark current is minimized by elimination of all mechanisms, other than light absorption, that are capable of generating electron-hole pairs. Therefore silicon defects, metallic impurities, and surface states must be controlled.
Therefore means are needed to store the excess charge associated with blooming and with Dark current. Means are also needed to more rapidly transfer those charges in a regulated manner.
Many applications require differential control of charge propagation in a plurality of CCD channels. A non-exhaustive list is suggestive of some of the applications of the present invention. Networks for parallel to serial, and vice versa, conversion; readout circuits for CCD memories; readout circuits for CCD imagers; decoding and multiplexing networks for CCD channels, CCD imagers; and serial-parallel-serial memory devices. It is understood that the enumerated applications are illustrative of the many uses of the present invention and it is understood that the invention is not limited to those applications.
An aspect of the invention provides a semiconductor field effect device comprising: a silicon substrate having a plurality of channel regions of a first depth wherein each said channel region having first and second portions and wherein each said channel region abuts channel stop; a plurality of first gate oxide regions wherein one of said first gate oxide regions is defined over each of said first portion of each of said channel regions; a plurality of first gate electrodes P1 wherein one of said first gate electrodes is defined over each of said first gate oxide regions; a plurality of second gate oxide regions wherein one of said second gate oxide regions is defined over each of said second regions of each of said second portion of each of said channel regions; a plurality of second gate electrodes P3, wherein one of said second gate electrodes is defined over each of said second gate oxide regions, wherein said first and second channel regions abut, and wherein said first and second gate electrodes abut a common insulator; a channel well integral with said channel region and extending part way under each of said first and second gate electrodes, said channel well having a second depth deeper than said first depth; and signal lines running over said channel stop wherein said signal lines make electrical connection to every fourth gate.
A further aspect of the invention is a charge couple device having channel wells in the channel region. The channel wells, located beneath every other overlap of P1 and P3 gates, permit greater charge holding capacity because of the increased volume of the channel itself. Additionally, the presence of the channel well allows for more rapid movement between gates of a greater number of charges by providing a charge sink at just over the transfer point when the gates are switched.
An additional aspect of the invention is a solid-state camera having a photosensitive target and having a semiconductor body having a plurality of charge storage capacities. Herein the photosensitive target is a charge-coupled device.
An aspect of the invention is the use of angled ion implantation to achieve a profile tailored channel well. Angled ion implantation is also an aspect of co-pending applications 0136/00299, 0136/300, and 0136/00301 (numbers reference attorney docket number) assigned to assignee of the present application. However, in the co-pending applications, angled ion implantation achieves other purposes.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the description is to be regarded as illustrative in nature and not as restrictive.